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The Blog
December 2017
SiFive — Dec 20, 2017
RISC-V QEMU Part 1: Privileged ISA v1.10, HiFive1 and VirtIO
This post covers recent development in RISC-V QEMU, the open source machine emulator and virtualizer. We’ve been playing a game of catch-up with the hardware folks so that we can match the capabilities of the Freedom U500 SDK. We’re not quite there yet, but we’ve made some important improvements that will allow for a more usable emulator.
SiFive — Dec 11, 2017
All Aboard, Part 9: Paging and the MMU in the RISC-V Linux Kernel
This entry will cover the RISC-V port of Linux's memory management subsystem. Since the vast majority of the memory management code in Linux is architecture-independent, the vast majority of our memory management code handles interfacing with our MMU, defining our page table format, and interfacing with drivers that have memory allocation constraints.
SiFive — Dec 5, 2017
All Aboard, Part 8: The RISC-V Linux Port is Upstream!
As some of you may have heard, the RISC-V Linux port has been accepted into Linus' tree and is slated to release as part of 4.15. While this is a major milestone, we're far from done in Linux kernel land and there's a whole lot of work left to be done in userspace.