Shanghai/Chengdu
Engineering
Full-Time

Verification Manager

At SiFive, you’ll be part of a fun, engaging team and be afforded the opportunity to grow within the company. You will bring fruition the new RISC-V architecture and enable its rapid adoption by implementing new tools, breakthrough design methods and services. We need people who are trail-blazers, aren’t afraid to take a chance, and don’t always “go with the flow”.

Responsibilities:

  • Lead verification team of 5~7 members for SoC and IP verification
  • Identify/develop verification techniques roadmap for team development and skillset improvement.
  • Setup verification plan and environment for both SOC level and IP level
  • Close coverage measures to identify verification holes and to show progress towards tape-out.
  • Leading the verification efforts in the projects and mentor/guide the verification leads
  • Working closely with design team to guarantee first pass silicon success

Qualifications:

  • BS degree or equivalent practical experience. MS in EE or CS is preferred.
  • 6+ years’ experience on IP based SoC verification.
  • 4+ SoC projects of verification leadership
  • Knowledge of classical RISC based CPU cores and AMBA/AXI or Tile-link bus protocol
  • knowledge of the advanced verification methodology and techniques. i.e. System Verilog, UVM, formal verification, coverage analysis…
  • Familiar with industry-standard simulators, revision control systems and regression systems.
  • Good people and communication skills in Mandarin and English
  • Good scripting skills in Perl, Python, tcl, shell, etc.
  • Strong team management, tasks management, performance management skill

Big Plus:

  • Experience in the verification of designs such as CPUs, DSPs, etc.
  • Strong experience with C++ programming and experience of verification in Chisel
  • Familiar with GCC compiler and common tool chain for Linux
  • Experience in validation/verification for RISC CPU/MCU core design
  • Prior management experience