Physical Implementation Engineer

As a Physical Design Engineer in the Implementation Team, you will participate in the tape out of chips to support the SiFive vision of enabling chip design by anyone. When you join our implementation team as a physical design engineer, you will take ownership and contribute as an implementation expert with comprehensive RTL to GDS experience who has taped out multiple ASICs with a wide range of process and technologies. 


  • Implement and verify ASIC designs of varying size and complexity using suitable front and/or back-end design flows on cutting edge process nodes
  • Interact with and drive various EDA vendors to improve the efficiency and quality of implementations 
  • Act as consultant for ASIC implementation queries both internal, and external 

Minimum qualifications

  • Extensive experience of ASIC implementation flow and challenges
  • Experience in logic synthesis, floorplanning, power grid design, clock network synthesis, place & route
  • Timing closure and sign-off experience with high-speed designs
  • Physical & formal verification experience
  • Power/Performance/Area evaluation and optimization
  • Good scripting skills using Tcl, Perl, Python, Makefile and Shell scripts

Preferred qualifications

  • Experience working with FinFET process nodes
  • Experience with low power design techniques (power gating, voltage/frequency scaling, etc) and clock tree debugging
  • Experience with Synopsys tools