Shanghai/Chengdu
Engineering
Full-Time

Design Engineer

SiFive is the leading provider of market-ready processor core IP, development tools and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors.
At SiFive, you’ll be part of a fun, engaging team and be afforded the opportunity to grow within the company. You will bring fruition the new RISC-V architecture and enable its rapid adoption by implementing new tools, breakthrough design methods and services. We need people who are trail-blazers, aren’t afraid to take a chance, and don’t always “go with the flow”.

Responsibilities:

  • Function/IP module coding and data path simulation
  • Chip level design and coding with good coding style
  • Co-work with software team to identify architecture requirements
  • Co-simulation with driver software program
  • Documentation for design spec in module level and chip level
  • IP module integration with direction of integration guide
  • FPGA prototyping development and debug
  • Evaluation of different architecture solutions
  • Define architecture of the CPU core and various hardware components surrounding the CPU, like local memory, interconnect and crypto accelerators

Qualifications:

  • Familiar with Tilelink/AMBA/AXI bus protocol
  • 4+ years of relevant experience on IP based front-end design
  • Familiar with EDA tools of simulator and synthesis, spyglass,
  • Experience with C/C++ program for driver or algorithm implementation
  • Experience of FPGA design and debug with JTAG
  • Good coding style for RTL design
  • Good people and communication skills in Mandarin and English

Big Plus:

  • Familiar with foundry lib, IP and process technology limitation
  • Familiar with tool chain (RTL, P&R, timing analysis/closure, power analysis, etc.)
  • Knowledge or project experiences of RISCV CPU
  • Knowledge of project experiences on SystemC modeling
  • Interest and experience for IP and chip design with chisel
  • Broad understanding to computer security and crypto algorithms like AES/SHA/RSA/ECC
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off, health, vision and dental benefits, 401(k) plan, employee stock option program, and much more. If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is place for you. Collaborate | Innovate | Empower