Senior Engineer - Physical Design
At Open-Silicon, a SiFive company, we design, develop and deliver advanced semiconductor solutions for a range of verticals and industries. We invented RISC-V, and our extensive line-up of best-in-class RISC-V processor cores has over 150 adoptees worldwide, including tier-1 semiconductor companies. Our custom SoC division delivers ASICs in the most advanced technology nodes and enjoys close partnerships with all leading silicon foundries. We push the envelope on advanced ASICs for artificial intelligence and machine learning. Our ASICs are also seen in satellite communication systems, IoT and extreme low-power mobile devices. We are leaders in high-speed networking and memory interface IP. With our expertise in package-silicon codesign, we belong to the technology elite that can deliver leading-edge products based on 2.5D interposer technology and 3D packaging. We have a global presence with multiple development centers in North America, Europe, China, Korea and India. Our design centers in India, located in Bangalore and Pune with additional sites under development, drive innovation and deliver solutions across our product portfolio. To support our growth and expansion plans, we are hiring across disciplines, including SoC architecture, analog design, logic design and verification, DFT, physical design, embedded software and board and system design.
- Lead physical design and physical design verification activities across the various projects.
- Own project specific flow setup and maintenance.
- Physical design tasks include floor-planning, place and route, CTS, timing closure, IR analysis and LEC for block level, full chip flat and hierarchical designs.
- Co-ordinate the full chip physical design and verification activities.
- Physical design verification tasks include creating setup and scripts for DRC, LVS, Antenna and density checks, report generation, analysis, debug and implementing the fixes in the physical design database. This also includes DFM checks for the advanced node designs.
- Ensure correct IP and pad-ring integration in block and flat designs.
- Prepare training plan and conduct training of new PD/PDV team members, new tools flow set-up and any tool evaluations.
- Work on IDP of the team members, performance management, etc. - Responsible for the technical issues in projects running with the team members and guide them to resolve the issues.
- Flag PD/PDV flow related issues to relevant person.
- Ensure Check list items are followed / Verified within projects.
- Take measures which saves time in future projects.( action items in flow revision)
- Participate in Focal process