Director - Analog & PHY IP Engineering

At Open-Silicon, a SiFive company, we design, develop and deliver advanced semiconductor solutions for a range of verticals and industries. We invented RISC-V, and our extensive line-up of best-in-class RISC-V processor cores has over 150 adoptees worldwide, including tier-1 semiconductor companies.  Our custom SoC division delivers ASICs in the most advanced technology nodes and enjoys close partnerships with all leading silicon foundries. We push the envelope on advanced ASICs for artificial intelligence and machine learning. Our ASICs are also seen in satellite communication systems, IoT and extreme low-power mobile devices.  We are leaders in high-speed networking and memory interface IP. With our expertise in package-silicon codesign, we belong to the technology elite that can deliver leading-edge products based on 2.5D interposer technology and 3D packaging. We have a global presence with multiple development centers in North America, Europe, China, Korea and India. Our design centers in India, located in Bangalore and Pune with additional sites under development, drive innovation and deliver solutions across our product portfolio. To support our growth and expansion plans, we are hiring across disciplines, including SoC architecture, analog design, logic design and verification, DFT, physical design, embedded software and board and system design.
Job Description:
(15+ Years of Experience)
·       Play a leadership role in managing the development of Interface and Analog IPs for internal ASIC or external customers
·       Hands on experience of Hard analog or PHY blocks on circuit design in latest finfet nodes like 16nm and 7nm
·       Mentoring and leading the team in terms of BKM
·       Work with Sales, Marketing and PM teams across globe to drive the processes for solid IP Development methodology to ensure success with customers
·       Ability to support multiple customers and IP Deliveries
·       Strong knowledge in all aspects of integration of IP related to e.g. logic design and verification, physical design, packaging, test and characterization.        
·       Experience in the IP Design and delivery of complex analog, mixed signal IPs or PHYs. Previous experience in DDR, HBM, SerDes is preferred.