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What’s Up Next

May 29, 2018

We recently announced that Intel Capital participated in our Series C funding round! Our CEO, Naveed Sherwani, revealed the investment earlier this month at the Intel Capital Global Summit.

The investment comes at a pivotal time as we cement our vision for the future. As you know, our goal is to leverage the body of software and tools available from the open-source community with the intention of dramatically reducing the cost of developing custom silicon. But you may be wondering what this really looks like…

We aim to get silicon in the hands of designers as quickly as possible. Let them take a test drive to run benchmarks and discover where the chip works well for an intended purpose, and then form a plan for when and how to move it into full-scale production. The hope is that this process supports all types of companies, including startups who otherwise might have to design around off-the-shelf silicon.

With our recent funding, including the Intel Capital investment, we look forward to making this a reality and continue leading the RISC-V revolution.

Ready For Take Off!

In addition to all of the good news, we’ve also had a lot of really great experiences over the past month. Here’s a snapshot of where we’ve been:

Barcelona Yunsup

To start the journey, we headed to Barcelona for some paella and the latest RISC-V Workshop. Andrew Waterman, Krste Asanovic, Palmer Dabbelt and Yunsup Lee led a total of five sessions, which included a demo of the full-featured Debian Linux Distribution running on HiFive Unleashed.

Next up was the Intel Capital Global Summit in Palm Desert where Naveed received the “Elevator Pitch Award” and announced the investment from Intel Capital.

Then, we hopped a flight to Shanghai for the GSA Symposium and our own 2018 Technical Symposium where we provided an overview of the RISC-V ISA, our history and future trends, as well as demonstrations from our executives and partners.

Featured Developer

Our view of the world centers around the developer, the engineer, the user, the dreamer. It’s you who are contributing to RISC-V and open-source, which makes what we do at SiFive possible.

We’d like to give a shout to Microsemi for collaborating with us on the HiFive Unleashed Expansion Board. It is an exciting time in the RISC-V revolution, and our work together to reach the broader Linux market is another landmark.

Upgrading the HiFive Unleashed board allows developers to add custom peripherals to the board via PCIe, USB and other connections. The Expansion Board will be available for a limited time only at the cost of $1,999, or you can get the HiFive Unleashed and the Expansion Board as a bundle of $2,998.

Are you working on something interesting? We’d love to feature you next. Drop by and let us know what you are working on!

Forum Highlight The SiFive Forums are buzzing! They are packed with valuable content that can answer your questions and curiosity surrounding RISC-V, development boards, IP evaluations and much more. Here’s a peek at some of the threads that caught our attention (and will now have yours, too!).

SiFive in the Press

Want to see who has been talking about SiFive recently? Let’s take a look!

SiFive Releases ‘Expansion Board’ to Build Interest in RISC-V Processor by Christine Hall, Data Center Knowledge

HiFive-Unleashed Expansion Board Opens Door for RISC-V PCs by Chris Wiltz, Design News

Expansion Board Enhances Popular RISC-V Development Board by Mathew Dirjish, Sensors Magazine

RISC-V expansion board for Linux software and firmware developers by Julien Happich, eeNews Europe

Intel Capital invests in RISC-V start-up SiFive by Gareth Halfacree, Bit-tech.net

Intel Capital invests $72M in startups, including 7 from the Bay Area by Cromwell Schubarth, Silicon Valley Business Journal

SiFive’s Design Democratization Drive by Camille Kokozaki, SemiWiki.com

RISC-V in the News

We’re always keeping an eye on RISC-V; after all, our founders invented it! Check out the latest conversations around the RISC-V ISA:

Thales to launch RISC-V into space applications by Peter Clarke, eeNews Europe

RISC-V processors make play for AI in Barcelona, says Esperanto by Richard Wilson, ElectronicsWeekly.com

Low-Power Play: GAP8 Weds Multicore RISC-V with Machine Learning by William Wong, Electronic Design

Brains behind seL4 secure microkernel begin RISC-V chip port by Richard Chirgwin, The Register

Andes adopts UltraSoC by David Manners, ElectronicsWeekly.com

Rambus picks RISC-V for new crypto chip by Gareth Halfacree, Bit-tech.net

We would love to hear from you - reply to this email with any questions or inquiries and we will get right back to you!

Thanks for your continued support!
Until next time,
Jack Kang

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