RISC-V ALU Design Engineer

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits. For more information, please visit www.sifive.com.

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As an ALU Design Engineer at SiFive, you will be part of a global team designing the best CPU cores in the world, based on the revolutionary open RISC-V architecture. You will master the art of designing hardware as configurable generators in a hardware-enhanced software language. You will be working in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance.

Responsibilities:

  • Architect, design and implement enhanced and new arithmetic functional units for RISC-V CPU Core generators in Chisel
  • Create more efficient shared arithmetic units; combining capabilities for single/double/half-precision floating point, integer, and/or fixed-point operations
  • Design in extensive configurability as a first-class consideration, including reuse of ALU designs for vector and scalar operations
  • “Plumb” new design content into the SiFive’s Chisel/FIRRTL framework to enable automatic configuration/generation of documentation, verification testbenches and tests, and packaged software.
  • Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans
  • Ensure that knowledge is shared via great documentation and a participation in a culture of collaborative design

Requirements:

  • 4+ years of recent industry experience in CPU design
  • Knowledge of vector architecture and concepts.
  • Prior experience designing high-performance vector and/or SIMD processors/units.
  •  Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL. 
  • Experience with Scala and/or Chisel is a plus.
  • Knowledge of at least one object-oriented and/or functional programming language.
  • Attention to detail and a focus on high-quality design.
  • Ability to work well with others and a belief that engineering is a team sport.
  • Knowledge of at least one object-oriented and/or functional programming language.
  • BS/MS in EE, CE, CS or a related technical discipline, or equivalent experience.
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off; health, vision and dental benefits; 401(k) plan; employee stock option program, and much more.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you!
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