RTL Design Engineer, RISC-V Load/Store CPU

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

As a Senior RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open-source RISC-V architecture. We are looking for people who are as excited as we are about working in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance.


  • Architecting, designing and implementing new features, performance improvements, and ISA extensions in RISC-V CPU core generators with a focus on the load/store unit and L1 data cache memory subsystem.
  • Microarchitecture development and specification. Ensuring that knowledge is shared via great documentation and participation in a culture of collaborative design.
  • Performing initial sandbox verification, and working with the design verification team to create and execute thorough verification test plans.
  • Work with the physical implementation team to implement and optimize physical design to meet frequency, area, power goals.
  • Collaborating with the performance modelling team for performance exploration and optimization to meet performance goals.


  • 7+ years of recent industry experience in high-performance, energy-efficient CPU designs:
    • Expertise in CPU processor designs in one or more of the following areas: load-store unit; L1 data cache, cache coherence, memory consistency, and Memory Management Unit (MMU).
    • Background of successful CPU development from architecture through tape-out and vector units; load-store unit; cache and memory subsystems.
  • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL.
  • Knowledge of at least one object-oriented and/or functional programming language.
  • Attention to detail and a focus on high-quality design.
  • Ability to work well with others and a belief that engineering is a team sport.
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off; flexible work environment; health, vision and dental benefits; 401(k) plan; employee stock option program, and much more.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you!
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Thank you for your interest in SiFive Inc. Please note that SiFive does not accept unsolicited resumes from external agencies unless contracted to fill a specific position. Agencies are hereby specifically directed NOT to contact SiFive employees directly in an attempt to present candidates – all applications must go through SiFive's internal recruiting team. Any third-party resume forwarded by agencies/external recruiters to a SiFive mailing address, fax machine or email address, directly to SiFive employees, or to SiFive's resume database will be considered property of SiFive Inc and treated as a direct application. This exchange does not constitute an agreement between SiFive and the agency/external recruiter. SiFive reserves the right to contact the candidate directly. Employment agencies/external recruiters will receive no compensation from SiFive or its companies.