News Archive

Optimized for data centers, 5G/edge cloud and autonomous vehicles Includes SiFive RISC-V E34 Management Core and proprietary DinoplusAI engine, and will be realized into working silicon by SiFive's Custom SoC Division using robust ASIC design and manufacturing methodology SAN MATEO, Calif. – Feb. 25...

Powerful and engaging events advance global knowledge about the RISC-V ISA and foster greater collaboration and opportunity within the open-source community Attendees will learn about the available design platforms, software and IP solutions that are democratizing access to custom silicon SAN MATEO,...

RISC-V leader honored for its products, growth and performance by Global Semiconductor Alliance SAN MATEO, Calif. — Dec. 11, 2018 — SiFive, the leading provider of commercial RISC-V processor IP, today announced it has been recognized as the 2018 Most Respected Private Semiconductor Company by the G...

Establish partnership for delivering increased possibilities for powerful RISC-V implementations RISC-V Summit, Santa Clara, California—December 3, 2018— IAR Systems®, the future-proof supplier of software tools and services for embedded development, and SiFive, the leading provider of commercial RI...

Demonstrations at RISC-V Summit Dec. 4-5 to Show Size, Power and Performance Benefits of Integrating PolarFire SoC's Hard CPU Subsystem with Programmable Logic RISC-V Summit, SANTA CLARA, Calif.—Dec. 4, 2018— In a new era of computing driven by the convergence of 5G, machine learning and the interne...

SiFive leads RISC-V ecosystem at inaugural summit with range of cores, RISC-V silicon, proof points, demonstrations, partnerships, talks and panels SANTA CLARA, Calif. — Dec. 4, 2018 — SiFive, the leading provider of commercial RISC-V processor IP, today announced a series of technical advancements ...