LLVM Compiler Engineer - RISC-V Vector
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits. For more information, please visit www.sifive.com.
We at SiFive are proud to take a software first approach to develop tools and frameworks that achieve cutting edge performance without compromising quality for the SiFive Intelligence processor family. The SiFive Intelligence processors deliver AI acceleration for the edge and beyond. SiFive intelligence builds on RISC-V Vectors (RVV) allowing SiFive to design Core IPs that deliver performance, are optimized for power and area, but do not sacrifice flexibility or programmability. Our software stack is codesigned with the hardware and developed with scalability and quality in mind. Join us to develop revolutionary software from the ground up!
Our LLVM-based, world class compiler technology is the backbone of the SiFive software stack that enables SiFive high-performance Linux-capable cores and SiFive Intelligence processors. The compiler team's mission is to deliver cutting-edge performance in SiFive products while working with the community to advance RISC-V architecture and ISA extensions. SiFive is an active participant in the RISC-V ecosystem that opens a vast opportunity to develop the next generation of computer architecture and compiler technology. SiFive engineers are active members and maintainers in many open source projects, and our mission is to work with and drive the RSIC-V ecosystem.
We are looking for a compiler team member with some LLVM experience, who is willing to learn techniques for tuning and optimizing the RISC-V LLVM compiler for the SiFive Intelligence processor family.
- Working with SiFive’s LLVM compiler team on improving performance for the SiFive Intelligence processor family, especially focusing on the RISC-V vector extension C intrinsic improvement.
- Working with SiFive’s benchmarking teams in analyzing performance results and suggesting new compiler optimizations.
- Working with SiFive’s compiler and release teams in releasing timely compiler toolchains for use by SiFive software and hardware teams.
- A degree in Computer Science or equivalent technical field of study.
- Have completed coursework, projects, internships, and/or research in data structures/algorithms and compilers.
- Have completed at least one internship, research assistantship, teaching assistantship, or equivalent practical experience in compilers.
- Having experience with SIMD (like NEON, AVX, SSE) programming for performance improvement is a big plus.
- Strong C++ programming skills.