Meet the Team
Democratizing access to custom silicon since 2015
Stefan serves as SiFive’s CEO and is also Managing Director at Sutter Hill Ventures. Prior to joining Sutter Hill Ventures, Stefan was Executive Vice President of the Platform Systems Division at Juniper Networks, responsible for the entire portfolio of routing, switching, and Wireless LAN products. Prior to Juniper, Stefan worked at Cisco Systems leading the Enterprise routing and security business. Stefan holds a MS in electrical engineering from Stanford University and a BS in electrical engineering and computer science from Duke University.
Yunsup is SiFive’s Chief Technology Officer and co-founder. Yunsup received his PhD from UC Berkeley, where he co-designed the RISC-V ISA and the first RISC-V microprocessors with Andrew Waterman, and led the development of the Hwacha decoupled vector-fetch extension. Yunsup also holds an MS in Computer Science from UC Berkeley and a BS in Computer Science and Electrical Engineering from the Korea Advanced Institute of Science and Technology (KAIST).
Krste is SiFive’s Chief Architect and a co-founder. Krste is also a Professor in the EECS Department at the University of California, Berkeley, where he is Director of the ASPIRE Lab. Krste leads the RISC‑V ISA project at Berkeley, and is Chairman of the RISC-V Foundation. He is an ACM Distinguished Scientist and an IEEE Fellow. Krste received his PhD from UC Berkeley, and a BA in Electrical and Information Sciences from the University of Cambridge.
Andrew serves as SiFive’s Chief Engineer and co-founder. Andrew received his PhD in Computer Science from UC Berkeley, where, weary of the vagaries of existing instruction set architectures, he co-designed the RISC-V ISA and the first RISC-V microprocessors with Yunsup Lee. Andrew is one of the main contributors to the open-source RISC-V based Rocket chip generator and the Chisel project. Andrew also has an MS from UC Berkeley and a BSE from Duke University.
Jack is currently Vice President of Product and Business Development at SiFive. Prior to SiFive, Jack held a variety of senior business development, product management, and product marketing roles at both NVIDIA and Marvell, with a long track record of very successful, large scale design wins. Jack started his career as a frontend design engineer, with a focus on CPU architecture and design. Jack received his BS degree in Electrical Engineering and Computer Science from UC Berkeley.
Renxin is currently Vice President of Engineering at SiFive. Prior to SiFive, Renxin had 20+ years of SoC and FPGA design and management experience, most recently at Altera (now part of Intel). His experiences range from SoCs for consumer applications to high-end FPGAs on leading process nodes, using both ASIC and full custom design flows. Renxin has a proven, successful track record of building organizations and delivering products at both startups and large corporations. Renxin holds a BSEE and MSEE from Stanford University and an MBA from UC Berkeley Haas School of Business.
Han is SiFive’s Chief Engineer for Chip Implementations and Methodology. During his eleven years at Synopsys, Han personally implemented and taped out multitude of chips including ARM’s first DVFS system, as well as helping to build the Mixed Signal IP Group and the IP chip factory. As Implementations Prime Lead, he led the digital implementation, integration, and test-chip teams that were responsible for dozens of tape-outs per year. Post Synopsys, Han was Principal Methodologist at ARM and created design methodologies that allowed for the tape-out of dozens of chips at ARM.
Ali is SiFive’s Chief Engineer for Chip Verification and Methodology. Ali received his Ph.D. from Concordia University (Montreal, Canada) where he developed formal and semi-formal techniques and methodologies for verifying system-level designs and languages. Prior to SiFive, Ali held several verification and front-end design roles at MIPS, NVIDIA and Qualcomm.
Dave retired after 40 years as an EECS professor at UC Berkeley before joining Google in 2016. He is probably best known for the book Computer Architecture: A Quantitative Approach and for the Berkeley RISC, RAID, and NOW projects. He is a member of the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He is a fellow of ACM, IEEE, both AAAS organizations and is on the RISC-V Foundation Board of Directors. He received BA, MS, and PhD degrees from UCLA.
Mark Horowitz is the Yahoo! Founders Professor at Stanford University and was Chair of the Electrical Engineering Department from 2008 to 2012. He co-founded Rambus Inc. in 1990 and is a fellow of the IEEE and the ACM and a member of the National Academy of Engineering and the American Academy of Arts and Science. Dr. Horowitz’s research interests are quite broad and span using EE and CS analysis methods to problems in molecular biology to creating new design methodologies for analog and digital VLSI circuits.
Borivoje Nikolic is the National Semiconductor Distinguished Professor of Engineering at the University of California, Berkeley. He received the Dipl.-Ing. and MSc degrees in electrical engineering from the University of Belgrade, Serbia, and the PhD degree from the University of California, Davis. His research interests include a wide range of topics in digital, analog and RF circuit and system design. He spent two years at Texas Instruments, working on disk-drive electronics.
Vladimir is an Associate Professor in the EECS Department at UC Berkeley. He is a Co-Director of the Berkeley Wireless Research Center. Vladimir received his MS/PhD from Stanford University and Dipl.-Ing. from University of Belgrade. He was also an Associate Professor at MIT and a Principal Engineer at Rambus Inc. Vladimir is a co-founder of Ayar Labs and NanoSemi, Inc.
Jonathan Bachrach is an Adjunct Assistant Professor at UC Berkeley where he teaches and researches software techniques to accelerate the design of electromechanical systems. Before UC Berkeley, he cofounded Other Lab, was a research scientist at MIT for 8 years, and held postdocs at Stanford and ICSI. He received a BS degree from the University of California San Diego and MS and PhD degrees from the University of Massachusetts Amherst.
Sander Arts is the former CMO of Atmel Corp and NXP Semiconductors and Founder of his own consultancy business.
After joining Atmel in 2012, Sander quickly repositioned Atmel to become a driving force at the center of innovation, focusing on the Internet of Things and the maker movement. Using creativity, community-building, and embracing ‘open source’ as an opportunity, Sander and his team led Atmel to create one of the largest social media footprints in the semiconductor industry and built direct links to revenue generated.
Previously, Sander worked at NXP Semiconductors (formerly Philips Semiconductors), rising to Global Head of Corporate Communications four years out of graduate school, becoming the youngest executive in Royal Philips in 2006. Follow him on Twitter: @sander1arts.
Mike Noonen is an adviser to the most innovative semiconductor and IoT companies. He also currently leads sales and business development at Silego Technology, the Configurable Mixed-Signal pioneer. Previously, Noonen was interim CEO at Ambiq Micro, Chairman of Silicon Catalyst, EVP at GlobalFoundries and NXP. In 2012 he was elected to the Global Semiconductor Alliance Board of Directors. Noonen has also held executive roles at National Semiconductor, Cisco Systems, and 8x8. He holds a BSEE from Colorado State University and was named the College of Engineering Distinguished Alumni.
Bertrand Irissou is a serial entrepreneur with over 25 years of industry experience in fabless semiconductor companies. Specializing in mixed signal analog IC design for consumer, automotive, and space industries, he was a co-founder and later CEO of ASIC Advantage, acquired in 2011 by Microsemi. More recently, he helped start and fund companies involved in semiconductor, robotics, and medical devices. Bertrand received his MS and BS in EECS from UC Berkeley.