As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits. For more information, please visit www.sifive.com.
We at SiFive are now looking for a junior to mid-level Core Architect to join our growing team! You will be vital to SiFive’s efforts to create silicon at the speed of software. You would be involved with the design and definition of various aspects of SiFive’s high-performance core pipelines, including but not limited to, branch predictors, dispatch logic, reorder buffer, load-store queues, and prefetchers. You will working with a team of engineers tasked with creating the basic collateral and specifications that can be reused across SiFive’s RISC-V and SoC design ecosystem.
- Creating the design and specification of various aspects of high-performance core architecture. Examples include the design of the fetch unit (including branch predictors), decode unit, issue logic, dispatch logic, functional units, load-store units, and instruction and data caches. Such design must comprehend PPA (performance, power, and area) impact.
- Developing the upcoming RISC-V platforms, which will connect numerous cores together on a chip, support large bandwidth, as well as new applications and workloads.
- Researching and analyzing emerging needs for new core architecture.
- MS or Phd in computer architecture with demonstrated innovative research in core architecture.
- Familiarity with advanced CPU architectures and pipelines.
- Experience in core design flow, including spec definition, Architecture design, and performance modeling.
- Comprehension various architectural ingredients, such as virtualization, security, power management, and others, when architecting the core pipeline.