Qemu System Modeling Engineer
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits. For more information, please visit www.sifive.com.
We at SiFive are proud to take a software first approach to develop tools and frameworks that achieve cutting edge performance without compromising quality for the SiFive Intelligence processor family. The SiFive Intelligence processors deliver AI acceleration for the edge and beyond. SiFive intelligence builds on RISC-V Vectors (RVV) allowing SiFive to design Core IPs that deliver performance, are optimized for power and area, but do not sacrifice flexibility or programmability. Our software stack is codesigned with the hardware and developed with scalability and quality in mind. Join us to develop revolutionary software from the ground up!
As a QEMU Engineer in the System Software Team, you will work with system architecture and hardware engineering teams to help design and evaluate systems, including CPUs, interconnects, firewalls, and related IP blocks. You’ll work with our software group to design software implementations that take advantage of hardware features and integrate cleanly with existing operating systems, such as Linux. You’ll write software for QEMU to model IP and instruction set. You’ll be a part of creating something big, all based around the RISC-V instruction set architecture.
- Design, develop and upstream QEMU and other simulation solutions (both SiFive-proprietary and public open source)
- Engage with architecture, hardware engineering, and other software engineering teams to review, and refine features
- At least 3 years’ experience developing QEMU for both instruction set and peripheral IP modeling, with upstream involvement
- Strong communication, co-working, and listening skills
- Experience working with hardware architecture and engineering teams
- Experience debugging complex multicore systems
- Experience debugging with GDB
- Experience with git, Makefile, GNU toolchain and shell scripting
- Deep understanding of computer architecture at the CPU and system levels