System Modelling Engineer
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
As a Software engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading RISC-V CPU cores. We are looking for people who are as excited as we are about working in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance.
Responsibilities:
- Developing and documenting C++ / SystemC / TLM models.
- Developing production-quality software, tests, and documentation using modern version control and CI/CD flows.
- Collaborating with hardware, software, and compiler teams to create market-leading products.
Requirements:
- 5+ years of software / hardware development / verification experience.
- Proficiency in Linux, C++, SystemC, Python, JavaScript, and Knowledge of hardware modeling tools .
- Good understanding of processor and SoC architecture, or a strong desire and ability to learn some.
- Strong oral and written communication skills, excellent team collaboration.
- Active contribution to opensource is a plus.
- Desire to learn more about compilers and tools.