Power Infrastructure / Design Automation Engineer
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
Sifive is looking for hardware engineers to lead the effort for developing power flows and methodologies for RTL and Gate power estimation, analysis and reduction to enable early power feedback.
- Develop automated flows to extract and validate activity windows for power tests based on performance targets and usage scenarios using. It ensures the quality of each power test.
- Develop automatic RTL to gate level mapping and experience with Gatesim/replay flows.
- Develop gate level power rollup and sign-off flows.
- Setup RTL and Gate power regression and maintain power dashboards.
- Develop and support power reduction, estimation and optimization automation.
- Generate extensive power reports, define metrics to track design progress.
- Hands on experience with industry standard power analysis and simulation tools.
- Experience with ASIC power analysis and optimization.
- Experience with script writing in Python, Perl or Tcl.
- Strong problem solving, organizational and communication skills, and ability to work in a dynamic and diverse environment
- Experience with low power methodology and flow development.
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off; flexible work environment; health, vision and dental benefits; 401(k) plan; employee stock option program, and much more.