Technical Lead - Random Test Generator
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
SiFive is looking for a verification Leader who is passionate about quality of the design and interested in working on the latest CPU verification methodology through development and usage of random test generators. This test generator development role provides opportunities to develop and apply Software Engineering principles for tool development for industry-leading CPUs based on revolutionary open-source RISC-V Architecture. We are looking for people who are as excited as we are about working in a fast-paced dynamic environment to bring products to market quickly, with high quality and exceptional performance.
We have multiple positions open at various levels. Join us and surf the RISC-V wave with SiFive!
- Architect, design and implement Random Test generator tool for RISC-V CPU cores.
- Use latest SW development processes to engineer the this SW product
- Continuous development of new features/enhancements in the random test generators as per CPU and IP product roadmap
- Provide high quality specifications and user support for internal design verification team users
- Collaborate with Design and verification team on the test generator features and priority of execution
- Knowledge sharing through great documentation and user training as needed.
- 12+ yrs of experience in CPU/IP design and verification with hands on SW tool development experience
- Experience in working with and driving a technology development team of highly skilled engineers