Performance Architecture - Workloads

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.  

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.  Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. 

Are you ready?  

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

 

Responsible for characterization of applications running on RISC-V cores with the goal of identifying potential Hardware and Software improvements. Needs to have understanding of computer architecture, micro-architecture, system software, benchmark software, and profiling and monitoring tools. Experience with running applications/benchmarks under Linux on multiple platforms (e.g. functional model, emulation, silicon) is required. Knowledge of competitive systems (e.g. ARM) will round out the candidate.

Responsibilities

• Using performance architecture skills, the successful candidate will perform competitive HW/SW analysis and optimize workloads to obtain high performance for the SiFive RISC-V microarchitecture, and build tools & flows to efficiently automate these activities.

Experience

• CPU Performance benchmarking using silicon, RTL simulators or performance models

• Workload performance analysis in the areas of optimal source code, efficient compilation and bottleneck analysis

• Desirable: Workload characterization and workload reduction techniques for performance simulation

• Desirable: FPGA or ASIC synthesis, place and route, develop strategies and constraints to enable near complete utilization of available FPGA resources.

• Desirable: FPGA debug, including use of Integrated Logic Analyzer for waveform capture and debug

Skills

• Ability to build Linux, root file systems and modify boot code ( cross and native compile experience)

• Deploying bare metal workloads on silicon boards for the purpose of performance measurement and board tuning

• Knowledge of SPEC, SPECrate, EEMBC, MLPerf, other standard benchmarks, and/or vector benchmarks

• Desired: SimPoint analysis, workload characterization, and workload reduction through BBV and statistical analysis

• Desired: Python and TCL scripting for workflow automation

Other

• Familiar with git or other source code control system

• Strong background with Linux-based development environments including python/shell programming

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

United States of America

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.