E6 Series


The SiFive® Essential™ E61 core is a mid-range performance 32-bit embedded processor that is fully-compliant with the RISC-V ISA. Its advanced memory subsystem enables inclusion of tightly-integrated memory and caches.

The E61 is ideal for applications that are 32-bit mid-range performance in a power-constrained environment (e.g., general purpose embedded, industrial, IoT, high-performance real-time embedded, automotive).

Key Features
  • Fully compliant with the RISC-V ISA specification
    • 32-bit RISC-V core
    • Machine and User Mode Support
    • In-order, single issue, 8-stage pipeline
  • Advanced Memory Subsystem
    • 16KB, 2-way Instruction Cache
    • Instruction Tightly Integrated Memory (ITIM) option
    • Up to 64KB Data Tightly Integrated Memory (DTIM) support
  • Efficient and Flexible Interrupts
    • Local interrupts w/ vectored addresses — up to 16
    • Platform Level Interrupt Controller (PLIC) — 128 interrupts w/ 7 priority levels
    • RISC-V Core Local Interruptor (CLINT) — 1 timer, 1 SW
  • 8-Region Physical Memory Protection (PMP)
  • High performance AMBA Interfaces
  • Benchmark Scores
    • 1.91 DMIPS/MHz
    • 3.69 CoreMark/MHz
  • Detailed Power, Performance, and Area (PPA) Information

Development Kit

Dev Kit Deliverables

  • RTL Evaluation
  • Test Bench RTL
  • Software Development Kit
  • FPGA Bitstream
  • Documentation