S6 Series


The SiFive® Essential™ S61-MC Standard Core is a mid-range-performance 64-bit quad-core embedded processor that is fully-compliant with the RISC-V ISA.

The S61-MC is ideal for latency-sensitive applications in domains such as storage and networking that require high-throughput, 64-bit memory addressability, and have real-time constraints (e.g., general purpose embedded, industrial, IoT, high-performance real-time embedded, automotive).

Key Features
  • Fully compliant with the RISC-V ISA specification
    • 4x 64-bit RISC-V core
    • Machine and User Mode Support
    • In-order, single issue, 8-stage pipeline
  • Advanced Memory Subsystem
    • 16KB, 2-way Instruction Cache
    • Instruction Tightly Integrated Memory (ITIM) option
    • Up to 64KB Data Tightly Integrated Memory (DTIM) support
  • Support for up to 40 physical address bits

  • Efficient and Flexible Interrupts
    • Local interrupts w/ vectored addresses — up to 16
    • Platform Level Interrupt Controller (PLIC) — 511 interrupts w/ 7 priority levels
    • RISC-V Core Local Interruptor (CLINT) — 1 timer, 1 SW
  • 8-Region Physical Memory Protection (PMP)
    • High performance AMBA Interfaces
  • Benchmark Scores
    • 2.07 DMIPS/MHz
    • 3.73 CoreMark/MHz
  • Detailed Power, Performance, and Area (PPA) Information

Development Kit

Dev Kit Deliverables

  • RTL Evaluation
  • Test Bench RTL
  • Software Development Kit
  • FPGA Bitstream
  • Documentation