U7 Series

U74-MC

The SiFIve U74-MC Standard Core is a high performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U74-MC has 4x 64-bit U74 cores and 1x 64-bit S7 core -- providing high performance with hard real-time determinism.

This U74-MC is ideal for applications requiring high-throughput performance with real-time guarantees (e.g., Enterprise Storage, Wireless/Wireline Networking, 5G Baseband Processors, SLAM Processors, Sensor Fusion, etc.)

U74-MC
Key Features
  • Fully compliant with the RISC-V ISA specification
  • 4x 64-bit RISC-V Application Core
    • 32KB L1 I-cache with ECC
    • 32KB L1 D-cache with ECC
    • 8 Region Physical Memory Protection
    • Virtual Memory support with up to 47 Physical Address bits
    • Integrated 128KB L2 Cache with ECC
  • 1x 64-bit RISC-V S7-Series Monitor Core
    • 16KB L1 I-Cache with ECC
    • 8KB DTIM with ECC
    • 8 Region Physical Memory Protection
  • Real-time capabilities
    • The L2 Cache can be configured into high speed deterministic SRAMs
  • CLINT for multi-core timer and software interrupts
  • PLIC with support for up to 128 interrupts with 7 priority levels
    • The L1 Instruction Cache and the L2 Cache can be configured into high-speed deterministic SRAMs
  • Debug with instruction trace
  • Benchmark Scores
    • 4.27/2.81 DMIPS/MHz (Best Effort/Legal)
    • 5.12 CoreMark/MHz
  • Detailed Power, Performance, and Area (PPA) Information
U74-MC
Cortex-A55 MP4
Instruction Set Architecture
4xRV64GBC and 1xRV64IMAC
ARMv8.2, AArch32, AArch64
16-bit Instruction Support
Yes
Only in 32-bit AArch32 T32 mode
Physical Memory Protection
PMP and MMU
MMU only
Monitor Core
Yes
No
Interrupt Controller
Optional; pre-Integrated
Licensed Separately; requires separate integration

U74-MC Development Kit

Dev Kit Deliverables

  • RTL Evaluation
  • Test Bench RTL
  • Software Development Kit
  • FPGA Bitstream
  • Documentation
U7
Series Overview

U7 Series

The U7 Series features SiFive’s high-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory, enabling the most demanding 64-bit RISC-V applications such as Edge Compute, Big-Data Analytics and 5G Base Stations.

U7 Series Highlights

Key Features

  • Up to 8 (+1) coherent high-performance RISC-V application processors
  • Supports an in-cluster coherent combination of application processors with real-time processors (U7 and S7)
  • Application processors with deterministic response
  • High-performance L1 memory microarchitecture
  • Virtual addressing supported with Sv48, Sv39
  • Physical Memory Protection
  • New microarchitecture features for enhanced security and real-time determinism
  • Support for SiFive Insight Advanced Trace and Debug
  • Support for whole SoC Security with SiFive Shield
  • Floating Point Unit supporting Double, Single and Half Precision
  • Tightly Integrated Core Local Port
  • Bit manipulation extension

Applications

  • Enterprise Storage, Smart NICs
  • Edge Analytics, Big-Data Analytics
  • Autonomous Machines
  • Edge Compute and Switching/Routing
  • 5G Base Stations

SiFive Essential
Standard Cores

Area
Standard Cores
Arm Comparison
E2 Series
M0, M0+, M3, M4, M23, M33
E6 Series
R4, R5
E7 Series
M7, R7, R8
S2 Series
***
S6 Series
R4, R5
S7 Series
M7, R7, R8
U6 Series
A5, A7, A35
U7 Series
A53, A55
Core Evaluation

From idea to reality.

Ready to see your code in action? The U74-MC Development Kit enables free evaluation of SiFive RISC-V Core IP.

Key
Deliverables

Evaluation RTL

  • Full-Functional, synthesizable Verilog RTL
  • Run it in your own simulator
  • Simple, no-cost evaluation license
Start U74-MC Free Trial

FPGA Bitstream

  • Fully-functional SiFive RISC-V Core Complex with system peripherals
  • High Performance - 32.5 MHz emulation
  • Upload your own programs using the Freedom E SDK

Compatible with the Xilinx VCU118 FPGA Development Board: