SiFive is an idea-to-silicon company founded by the inventors of RISC-V to simplify the design and production of custom SoCs.
As the leading commercial provider of RISC-V processor IP, SiFive is on a mission to help engineers design custom chips for domain-specific solutions for many markets, including 5G, edge AI, enterprise networking, storage, and consumer devices.
Industry-leading innovators, including six of the top ten semiconductor companies, are working with SiFive thanks to our proven success, deep expertise, and rich partner ecosystem. With SiFive’s rich IP ecosystem and accessible design platform, every market has access to the development of workload-focused hardware needed to design next-generation products.
As a QA Engineer, you will be joining the Release Management team working closely with Senior Operation Engineers and collaborating with the Engineering teams to qualify customers' SiFive CoreIP products before delivering them. You will participate in implementing and executing the Operations team strategy to build, improve and support all release operations. RISC-V is highly configurable, by its design philosophy. Your role is to help our Operation Engineers to create a design pipeline, with various combinations of supported instruction sets and with various peripherals and bus interconnect architectures.
This is a perfect role for an entry level or junior RTL design/embedded engineer looking to grow their career towards RISC-V CPU design/verification/software roles.
- Running QA checks on release deliverables to ensure customers have a great out of box experience.
- Communicating directly with Field Application Engineers/Engineering teams regarding any failures, discrepancies with benchmark scores.
- Participating in the implementation and execution of our release strategy.
- Day to day support of release operations' customers deliveries.
- Working with Release Operation engineers and other engineering teams to ensure customer requirements are met and delivered.
- Writing new test cases in Bare Metal environment using Assembler and C.
- BS/BE in Electrical Engineering or Computer Science, 1-2 years of proven experience.
- Understanding of CPU IP such as RISC-V, ARM, MIPS, and ASIC Design Flow.
- Understanding of Linux command lines and writing scripts for automation.
- Understanding of embedded software and development tools.
- Willingness to continue learning and growing in a professional environment is a must.
- Good verbal and written communication skills.