ProductsSiFive Core IPPerformanceIntelligenceEssentialSiFive Core DesignerSoftwareBoardsSoC IPCustom SiliconDocumentationCustomer Support
RISC-V ALU Design Engineer
SiFive is an idea-to-silicon company founded by the inventors of RISC-V to simplify the design and production of custom SoCs.
As the leading commercial provider of RISC-V processor IP, SiFive is on a mission to help engineers design custom chips for domain-specific solutions for many markets, including 5G, edge AI, enterprise networking, storage, and consumer devices.
Industry-leading innovators, including six of the top ten semiconductor companies, are working with SiFive thanks to our proven success, deep expertise, and rich partner ecosystem. With SiFive’s rich IP ecosystem and accessible design platform, every market has access to the development of workload-focused hardware needed to design next-generation products.
As an ALU Design Engineer at SiFive, you will be part of a global team designing the best CPU cores in the world, based on the revolutionary open RISC-V architecture. You will master the art of designing hardware as configurable generators in a hardware-enhanced software language. You will be working in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance.
- Architect, design and implement enhanced and new arithmetic functional units for RISC-V CPU Core generators in Chisel
- Create more efficient shared arithmetic units; combining capabilities for single/double/half-precision floating point, integer, and/or fixed-point operations
- Design in extensive configurability as a first-class consideration, including reuse of ALU designs for vector and scalar operations
- “Plumb” new design content into the SiFive’s Chisel/FIRRTL framework to enable automatic configuration/generation of documentation, verification testbenches and tests, and packaged software.
- Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans
- Ensure that knowledge is shared via great documentation and a participation in a culture of collaborative design
- 4+ years of recent industry experience in CPU design
- Knowledge of vector architecture and concepts.
- Prior experience designing high-performance vector and/or SIMD processors/units.
Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL.
Experience with Scala and/or Chisel is a plus.
Knowledge of at least one object-oriented and/or functional programming language.
- Attention to detail and a focus on high-quality design.
- Ability to work well with others and a belief that engineering is a team sport.
- Knowledge of at least one object-oriented and/or functional programming language.
- BS/MS in EE, CE, CS or a related technical discipline, or equivalent experience.