San Mateo, CA
RISC-V is a groundbreaking CPU instruction set architecture. Along with being an open-source instruction set, RISC-V is informed by decades of industry experience with various RISC processor designs, while being unencumbered with the necessity of backward compatibility. It is a unique opportunity to base a processor design on sound engineering principles, and the successful applicant will have comprehensive daily hands-on exposure to this architecture. While several companies are pursuing RISC-V design, only SiFive is founded and actively run by the inventors of RISC-V. This is not an academic exercise; we have real customers and real silicon.
The SiFive Platform Engineering team is building an ambitious new infrastructure to support accelerated ASIC and FPGA design flows, IP delivery and SoC development - driving the next generation of SiFive's "Silicon at the speed of Software" mission. This infrastructure leverages state of the art compiler algorithms (built on open source MLIR and LLVM technologies), novel build system integration, and new Verilog RTL generation techniques.
Our team combines many different perspectives and experiences, and we love working with people who combine a passion for learning and growth with product focus, practical experience, and a desire to build world-changing technologies.
- Evolve, design and build new compiler intermediate representations for hardware design and tool flows;
- Implement specific compiler optimization and lowering algorithms for chip design flows;
- Implement state of the art mechanisms for hierarchical caching that crosscut compiler and build systems;
- Participate in design discussions, planning, code review, documentation, open source processes, and other standard software practices;
- Manage your individual project priorities, deadlines and deliverables.
- 2+ years of compiler engineering experience;
- Strong oral and written communication skills, excellent team collaboration;
- Experience with C++ programming and git-based development workflows;
- Experience with Verilog and other chip design technologies is NOT required.
We encourage applicants from traditionally underrepresented groups in computer science to apply!
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off, health, vision and dental benefits, 401(k) plan, employee stock option program, and much more. If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is place for you.