A RISC-V future is inevitable

We invented RISC-V

SiFive was founded by the inventors of RISC-V, who have been developing the RISC-V instruction Set Architecture (ISA) since 2010. Focused on RISC-V solutions, we maintain the largest investment and team focused on RISC-V, delivering the broadest portfolio of RISC-V products that is the most widely adopted in the world.

RISC‑V is a free and open ISA designed for today’s software stacks. Rapid industry-wide adoption has enabled RISC‑V to be the new compute standard.

It’s time to specialize

SiFive innovation in microarchitecture design and configurability has created an industry-leading portfolio of RISC-V processor cores for domain-specific SoC design. Taking full advantage of leading process technology requires lean, workload-tuned silicon that can be agilely developed based on open standards with industry-led and individual customizations.

The SiFive® Core IP portfolio of RISC-V processor cores delivers this based on unique microarchitecture generators that offer unmatched configurability and extensibility.

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