Moore’s Law has ended.
It’s time for a paradigm shift.
For 30+ years, chips kept getting faster and cheaper. In the race to get to the next process node, there wasn't time or a need to customize. But the world has changed—compute has hit a limit and the cost of building chips keeps increasing exponentially.
The next wave of innovation is now happening at the hardware-software interface, and companies need custom silicon solutions to stay ahead. SiFive is leading the charge.
Start with your idea, get it in silicon.
Chips are in everything you own. Yet until now, only the biggest players with the deepest pockets could create custom SoCs.
SiFive is changing all of that. Now, thanks to our powerful design tools, every entrepreneur, inventor and innovator can translate their dreams into silicon.
A new way of building custom silicon.
Choose the base SoC that suits your application. Create variations using a rich library of IP from our DesignShare Partners — or onboard your own IP. Save as many chip designs as you like.
Run your application code on virtualized chips. Iterate until you get the performance that’s right for your product.
Receive sample chips within weeks — at a deep discount. With SiFive, there are no upfront IP costs until you need production quantities.
We invented RISC‑V.
SiFive’s founders are the same UC Berkeley professor and PhDs who invented and have been developing the RISC‑V Instruction Set Architecture (ISA) since 2010.
RISC‑V is a free and open ISA designed for today’s software stacks. Rapid industry-wide adoption has poised RISC‑V to be the new standard for compute.
Customize your RISC-V core.
SiFive Standard Cores are the most silicon-deployed RISC‑V solutions in the world. From low-power embedded microcontrollers to multi-core applications processors, our core IP is the lowest risk, easiest path to RISC-V.
SiFive Standard Cores are customizable and can be tuned to meet precise needs with the SiFive Core Designer.
Free evaluation Dev Kits with Verilog RTL and FPGA bitstreams are available to download now.
Here's how it works.
Customize a SiFive Standard Core to meet the precise needs of your product.
Simulate with fully-functional, synthesizable Verilog RTL. Run your application code on an FPGA.
Licensing is straightforward and your custom RISC-V core IP is available within weeks.
“RISC‑V offers a fresh approach that has the potential to help reduce SoC development time and cost significantly.”
Raja Koduri — GM Edge Computing Solutions, Chief Architect, Intel