It’s time to specialize...

The future is domain-specific.

SiFive innovation in microarchitecture design and configurability has created an industry-leading portfolio of RISC-V processor cores for domain-specific architecture. Taking full advantage of leading process technology requires lean, workload-tuned silicon that can be agilely developed based on open standards with industry-led customizations and individual customizations. The SiFive Core IP portfolio of RISC-V processor cores delivers this based on four unique microarchitecture generators that offer unmatched configurability, extensibility, and customization.

SiFive Founders

We invented RISC‑V.

SiFive’s founders are the same UC Berkeley professor and PhDs who invented and have been developing the RISC‑V Instruction Set Architecture (ISA) since 2010.

RISC‑V is a free and open ISA designed for today’s software stacks. Rapid industry-wide adoption has poised RISC‑V to be the new standard for compute.

Group protrait of the three founding members of SiFive

Andrew Waterman

Co-Founder & Chief Engineer

Yunsup Lee

Co-Founder & Chief Technology Officer

Krste Asanovic

Co-Founder & Chief Architect

Core Designer

Customize your RISC-V core.

SiFive Standard Cores are the most silicon-deployed RISC‑V solutions in the world. From low-power embedded microcontrollers to multi-core applications processors, our core IP is the lowest risk, easiest path to RISC-V.

SiFive Standard Cores are customizable and can be tuned to meet precise needs with the SiFive Core Designer.

Free evaluation Dev Kits with Verilog RTL and FPGA bitstreams are available to download now.

Here's how it works.

  • 01. Design

    Customize a SiFive Standard Core to meet the precise needs of your product.

  • 02. Evaluate

    Simulate with fully-functional, synthesizable Verilog RTL. Run your application code on an FPGA.

  • 03. License

    Licensing is straightforward and your custom RISC-V core IP is available within weeks.

What People
are Saying

RISC‑V offers a fresh approach that has the potential to help reduce SoC development time and cost significantly.

Raja Koduri — GM Edge Computing Solutions, Chief Architect, Intel

SiFive's Core Designer allowed our design team to get direct, hands-on access much earlier in the process and enabled us to rapidly optimize our configuration..We were impressed by the robustness and completeness of SiFive Core Designer as well as the support we received.

Prashant Shamarao, Vice President, Product Development, Synaptics, Inc.

As Innovium’s highly successful TERALYNX switches ramp in Cloud and Edge data centers, we continue to invest in an industry-leading roadmap for next-generation networks. We are pleased to use SiFive’s processor IP in our products for additional flexible and programmable capabilities in the areas of management and configuration.

Rajiv Khemani, CEO, Innovium, Inc.

SiFive's RISC-V Core IP was 1/3 the power and 1/3 the area of competing solutions, and gave FADU the flexibility we needed in optimizing our architecture to achieve these groundbreaking products.

Jihyo Lee, CEO, FADU

SiFive Core IP enabled us to quickly design a HyperX™ architecture-based customized solution which met the target platform requirements. SiFive’s flexible business model enabled a seamless engagement for us while offering market-leading SWAP for our end Customer.

Michael Doerr, CEO, Coherent Logix