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James Prior, Senior Director of Product Marketing Communications—October 24, 2019
Incredibly Scalable High-Performance RISC-V Core IP
Introducing the new SiFive U8-Series Core IP
SiFive is pleased to introduce the SiFive U8-Series Core IP, an incredibly scalable high-performance microarchitecture for modern SoC designs. The SiFive U8-Series is the highest performance RISC-V ISA based Core IP available today, based on a superscalar out-of-order pipeline with configurable pipeline depth and issue queue width. SiFive U8-Series Core IP is designed for use in performance- and latency-sensitive markets, such as automotive, datacenter attach, and edge or end point deep learning SoCs.
The needs of the modern world to solve problems using deep learning and real-time low latency processing are increasing compute workloads in the enterprise, and migrating tasks into the edge and end point. Domain specific SoCs are being used to localize compute to reduce latency, improve workload performance, and increase efficiency. The requirements of modern SoCs include scalable processor cores that span current process technology, enabling configurable designs, and permit customization.
Based on the open, freely available RISC-V ISA, SiFive U8-Series Core IP is well-positioned to address these challenges. The SiFive 8-Series microarchitecture is fully parameterized to enable the generation of a vast array of configurations, allowing customers to explore the design space and fine-tune performance and features to the desired workload.
SiFive U8-Series Standard Cores
SiFive will initially offer two standard cores in the SiFive U8-Series Core IP lineup. The standard core offerings will be the SiFive U84 core, optimized for power efficiency and area efficiency, and the SiFive U87 core with vector processing. The SiFive U84 design, focused on optimized efficiency, is the lead standard core, with more details on the SiFive U87 design to be released later.
Incredible, Efficient Performance
Generationally, the SiFive U84 core offers a startling 3.1X higher performance than SiFive's popular U74 standard core. This is enabled by a 2.3X increase in IPC combined with a 1.4X increase in maximum frequency capability. Shown below, the SiFive U84 is 5.3X higher performance than the SiFive U54, isolated process. The SiFive U84 standard core in 7nm is 7.2X higher performance compared to a SiFive U54 standard core in 28nm.
Winning Area Efficiency
A quad-core SiFive U84 CPU, including 2MB of L2 cache, requires only 2.63mm2 in 7nm process technology while capable of operating at up to 2.6GHz clock speed. A single SiFive U8-Series CPU core, without L2 cache, can be laid out in as little as 0.28mm2. This massive area reduction without performance impact reduces overall solution cost, or allows the use of silicon area for new compute functions.
The SiFive U84 standard core offers an incredible increase of 2X better area efficiency1 and 1.5X better performance/watt1, with very competitive performance when compared to an Arm® Cortex®-A72 processor.
SiFive U8-Series Core IP will be available on a variety of process nodes, from mass-market to leading-edge. The availability of verified IP with modern high-performance CPU features across such a broad array of foundry options defines the SiFive U8-Series as leading the market in scalability for design target and SoC design support.
SiFive U8-Series scalability doesn’t end there, with the ability for SiFive customers to configure options inside the entire Out-Of-Order design space hyperplane. While the SiFive U84 standard core is configured with a 12-stage pipeline and triple-issue capability, the pipeline depth, issue queue count, and other options can be adjusted to perfectly suit the target market applications.
SiFive U8-Series microarchitecture scalability options include the capability to cross-issue from the integer unit to the floating point unit, when the FP queue is empty. This flexibility when combined with design scalability of number of issue queues, and FP units in the design, can offer significant performance increases depending on the workload.
SiFive U8-Series Core IP also features composable caches, enabling real-time operation support. For markets where low-latency, deterministic behavior is required, the ability to configure the high-performance OoO core to operate deterministically while maintaining the advantages of tiny area and superb efficiency makes SiFive U8-Series the obvious choice for automotive, enterprise, and edge or end point AI markets.
SiFive offers the ability to support heterogeneous core complexes, composed of different class cores. SiFive Mix+Match enables the design of core complexes with a mix of cores to enable the right level of processing capabilities for the target workload. On top of this, SiFive Custom Instruction Extensions permit any core to be enabled with new instructions to make workload acceleration simple and easy. Custom Accelerator IP from 3rd parties can be coherently included with SiFive’s TileLink coherent fabric for core-to-core communication, or SiFive ChipLink coherent fabric for chip-to-chip communications.
SiFive also offers high-bandwidth memory interface IP, supporting SiFive TileLink and industry standard protocols, for SoC or chiplet style designs for memory intensive workloads that require the latest HBM2E+ memory capabilities. With validation in 7nm and 12nm process technology currently in progress, SiFive is extending high-performance DRAM capabilities from existing 16nm processes to leading-edge technologies.
Today’s introduction of the new, high-performance SiFive U8-Series Core IP begins a new chapter for modern SoC design. Performance, area efficiency, and energy efficiency are key metrics for chip designers, and the SiFive U8-Series is compelling on all fronts. SiFive’s unique configurable methodology for fine-tuning IP to customer requirements unlocks the full potential of next-generation SoCs for markets that require high-performance application processor cores.
SiFive now welcomes lead access to the new, high-performance SiFive U8-Series of application processor Core IP - please contact SiFive to find out more on how your next modern SoC design can benefit.
1 – Based on SiFive internal estimates of SPEC Int/GHz per Watt, and Power per MM2 of SiFive U84 Core with L2$ vs Arm® Cortex®-A72, of core implementation in 16nm process technology. 2 – Based on SiFive internal estimates compared to SiFive U7-Series using iso-process & iso-frequency methodology.
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