SiFive - September 21, 2018

Last Week in RISC-V: Sept 21, 2018

Introduction to Linux Kernel Development

For those of you interested in getting involved in the RISC-V Linux kernel porting effort, I wrote a short email that links to the various sources of information that might help people get started.

Developer Room at FOSDEM

I submitted a proposal for a RISC-V developer room at FOSDEM next February. Last year our talk went great and a room was suggested, so I anticipate this will be accepted. We should officially hear back about the submission by the end of the month. Thanks to Karsten for starting the thread that got the discussion started.

RISC-V Buildroot Patch Submission

Thanks to Mark Corbin from Embecosm for contributing this section

I have a (hopefully final) set of patches out for RISCV-64 support on Buildroot - see

Until these patches make it into the repository... a version based on Buildroot 2018.08-rc1 is available at - see the github wiki for details.

32-bit time_t on RISC-V Systems

As part of submitting the C-SKY Linux kernel port (which I pay attention to because they used the RISC-V port as a template), Arnd Bergmann brought up the possibility of C-SKY submitting a Linux port free of 32-bit time_t interfaces. I'd recently talked to some of the glibc folks about this and we're hoping that the RISC-V port can be free of 32-bit time_t as well, and it's looking like things might line up to do so for us. There's more information available as part of my hijack of the C-SKY patch review thread.

The official position here is that our 32-bit kernel ABI is not stable, because we haven't submitted our glibc port yet. This has been discussed with the Linux community and they seem OK with it, hopefully we'll soon have an upstream 32-bit glibc port so we can officially declare ABI stability!

RISC-V Microconference at Linux Plumbers

Atish's RISC-V Microconference has officially been accepted as part of Linux Plumbers.


Contributing to "Last Week in RISC-V"

Like everything else in the RISC-V ecosystem, this won't be possible as just a one-man effort. I'm hosting the sources at, so if you're comfortable editing them feel free to open a pull request. If you don't want to get involved in GitHub then you're also welcome to just mail me patches or blurbs for inclusion and I can merge them together.

I don't really have any specific criteria as to what will or won't be included. Part of the reason I'm doing this is that the RISC-V ecosystem has started to get big enough that there are huge sections of it that I know nothing about, so I think the starting criteria will be "anything I'm interested enough in to want to read" and we'll just go from there!