SiFive - June 14, 2017

The FE310 is in a Museum – Which is Pretty Cool

It’s been quite busy the past month and change for SiFive and the RISC-V community. On May 4, we unveiled our RISC-V Core IP, radically redefining the process by which you can license and buy custom IP. The RISC-V Core IP launch was followed by a panel at Maker Faire Bay Area, where we got to chat with American computer engineering pioneer Dave Patterson and other panelists about RISC-V and the future of open-source hardware (pictured below).

RISC-V panel at Maker Faire Bay Area 2017 (From left to right: Dave Patterson, Jack Kang, Madelynn Martiniere, Ted Speers, Frederico Musto)

Our latest piece of exciting news comes by the way of John Culver and the CPU Shack Museum. John reached out to us a few weeks back and expressed his interest in including the SiFive FE310 SoC – the industry’s first commercially available SoC based on the RISC-V ISA – in his museum which focuses on “preserving microprocessors and controllers throughout the history of computing.” John told us the museum has recently focused on embedded processors, specifically those with RISC cores, and asked if we could send him some FE310 processors to be included in the museum. Needless to say, we were eager to get involved.

The CPU Shack Museum is rich with microprocessors, boards and controllers of all shapes and sizes. We are truly thrilled to be included in such a dense library of hardware and consider it to be another important milestone for the RISC-V community. After receiving samples of the FE310 SoC, John posted a summary of RISC, the RISC-V project and how the FE310 compares to other microprocessors on the market. You can find the article in its entirety here.

For more information on the CPU Shack Museum, visit the website here.