U7 Series
U74
The SiFive U74 Standard Core is a single-core instantiation of a high performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux.
The U74 is ideal for applications requiring high-throughput, single-thread performance -- but have power constraints (e.g., AR, VR, sensor hubs, IVI systems, IP cameras, digital cameras, gaming devices, etc.)
U74
Key Features
- Fully compliant with the RISC-V ISA specification
- 64-bit RISC-V Application Core
- 32KB L1 I-cache with ECC
- 32KB L1 D-cache with ECC
- 8 Region Physical Memory Protection
- Virtual Memory support with up to 47 Physical Address bits
- Integrated 128KB L2 Cache with ECC
- Real-time capabilities
- The L2 Cache can be configured into high speed deterministic SRAMs
- CLINT for multi-core timer and software interrupts
- PLIC with support for up to 128 interrupts with 7 priority levels
- Debug with instruction trace
- Benchmark Scores
- 4.27/3.32 DMIPS/MHz (Best Effort/Legal)
- 5.75 CoreMark/MHz
- Detailed Power, Performance, and Area (PPA) Information
S+U+M Mode
U74 Development Kit
Dev Kit Deliverables
- RTL Evaluation
- Test Bench RTL
- Software Development Kit
- FPGA Bitstream
- Documentation
Series Overview
U7 Series
The U7 Series features SiFive’s high-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory, enabling the most demanding 64-bit RISC-V applications such as Edge Compute, Big-Data Analytics and 5G Base Stations.
U7 Series Highlights
Key Features
- Up to 8 (+1) coherent high-performance RISC-V application processors
- Supports an in-cluster coherent combination of application processors with real-time processors (U7 and S7)
- Application processors with deterministic response
- High-performance L1 memory microarchitecture
- Virtual addressing supported with Sv48, Sv39
- Physical Memory Protection
- New microarchitecture features for enhanced security and real-time determinism
- Support for SiFive Insight Advanced Trace and Debug
- Support for whole SoC Security with SiFive Shield
- Floating Point Unit supporting Double, Single and Half Precision
- Tightly Integrated Core Local Port
- Bit manipulation extension
Applications
- Enterprise Storage, Smart NICs
- Edge Analytics, Big-Data Analytics
- Autonomous Machines
- Edge Compute and Switching/Routing
- 5G Base Stations
Core Evaluation
From idea to reality.
Ready to see your code in action? The U74 Development Kit enables free evaluation of SiFive RISC-V Core IP.
Key
Deliverables
Evaluation RTL
- Full-Functional, synthesizable Verilog RTL
- Run it in your own simulator
- Simple, no-cost evaluation license
FPGA Bitstream
- Fully-functional SiFive RISC-V Core Complex with system peripherals
- High Performance - 32.5 MHz emulation
- Upload your own programs using the Freedom E SDK
Compatible with the Xilinx VCU118 FPGA Development Board:
