SiFive, the leading provider of commercial RISC-V processor IP, today announced that Wasiela, a provider of innovative PHY-layer IP from the system and algorithmic levels all the way to implementation, has joined the DesignShare ecosystem. The availability of Wasiela encryption, forward error correction (FEC) and connectivity IP through the program will ease the development of reliable and secure high-throughput data communications for the RISC-V platform.
SiFive, the leading provider of commercial RISC-V processor IP, today announced that ASIC Design Services, a design house, IP provider, and a distributor for FPGA and EDA software, has joined the DesignShare ecosystem. Through this partnership, ASIC Design Services will provide its Core Deep Learning (CDL) technology that accelerates Convolutional Neural Networks (CNNs) on power-constrained embedded hardware platforms.
SiFive, the leading provider of commercial RISC-V processor IP, today announced the first open-source RISC-V-based SoC platform for edge inference applications based on NVIDIA’s Deep Learning Accelerator (NVDLA) technology.
This week saw another indication that open source hardware is ready to seriously vie for a slice of the enterprise IT pie. On Monday the major company behind the open source RISC-V processor, SiFive, reported it had raised $50.6 million in a Series C funding round, bringing total funding to $64.1 million.
The RISC-V architecture is making an impression. That was reflected Monday in the announcement of $50.6 million raised by SiFive, a semiconductor startup that has been leveraging the free and open source architecture to reduce the cost and manpower required for chip development.
With the race to next-generation silicon in full swing, the waterfall of venture money flowing into custom silicon startups is already showing an enormous amount of potential for some more flexible hardware for an increasingly changing technology landscape — and Naveed Sherwani hopes to tap that for everyone else.